Friday, November 18, 2011

Fri., Nov. 18th

Plan for today:

  1. Finish testing CTU with new connections.
  2. Maybe add a PLL to the CTU for improved resolution of GPS time measurements.
Tweaking pin assignments some more:


  • GPIO 0 (Wi-Fi) - Inner header
    • Pin 11 = +5V power supply to Wi-Fi module.
    • Pin 9 (GPIO0_D6) <-- Serial CTS input from Wi-Fi kit
    • Pin 10 (GPIO0_D7) --> Serial RTS output to Wi-Fi kit
    • Pin 12 = GND supply to Wi-Fi module.
    • Pin 13 (GPIO0_D8) <-- Serial RxD input from Wi-Fi kit
    • Pin 14 (GPIO0_D9) --> Serial TxD output to Wi-Fi kit
  • GPIO 1 (GPS) - Outer header
    • Pin 27 (GPIO1_D20) <-- PPS input from GPS kit, J4 pin 15.
    • Pin 29 = +3.3V power output to GPS kit.
    • Pin 30 = GND supply to GPS kit.
    • Pin 31 (GPIO1_D22) <-- Serial RxD input from GPS kit, J5 pin 15 (UART0TX).
    • Pin 32 (GPIO1_D23) --> Serial TxD output to GPS kit, J5 pin 16 (UART0RX).


...Then I spent the whole afternoon doing a lot of tinkering and fiddling which I'm not going to go into all the details of.  Suffice it to say, I discovered the following:

For some reason, pin 31 of GPIO 1 on the DE3 board seems to be "broken," in the sense that it pulls to 0 even when it's only being used as an input.  Thus, I'm now using pins 39+40 for Rx/Tx to GPS instead of pins 31+32.

It doesn't seem to work to communicate with the GPS kit directly though pins 15+16 of the kit's J5, perhaps because its MAX3222 can't be disabled; so instead, I have plugged the SparkFun level-shifter onto J6 (powered with +3.3V from DE3's GPIO1) and meanwhile I am also supplying +5V power to the GPS module from GPIO1 through pins 4+24 of J5.

Oh, and BTW right now the OCXO board (which I soldered the temporary SMA connector onto) is being supplied +3.3V from GPIO0, while meanwhile the Wi-Fi board is powered by +5V from GPIO0.  So we're using all 4 of the power outputs on the GPIO boards!

Here is a photo of the fully assembled and running CTU electronics:
Assembled CTU electronics.  The GPS module, level-shifter and
OCXO board are all drawing their power through the DE3 board.

Some next steps:
  1. Add a compile-time (or better, DIP-switchable) option to disable debugging output.
  2. Burn design to EEPROM.
  3. Test power-up sequence.
Just for fun, I did a test with both the CTU and the FEDM powered up and talking to the server at the same time.  That worked fine.  This works because currently CTU is node #0 and FEDM is node #1, based on the nodeid.txt files loaded into their respective Wi-Fi boards (#3 and #1).

One more thing: The GPS seems to be still having trouble acquiring satellites; I may need to go into the DeLorme app and tinker around with it until it is healthy again.

    No comments:

    Post a Comment