Wed., Dec. 7th

Ray and I went over to the Tech Transfer office to talk about the Cosmic Cube disclosure.  They are going to file for a provisional.  They also are going to pay for us to take the course offered by the Entrepreneurial Excellence Program run by the Tallahassee/Leon County Economic Development Council.

The GPS app is still running from last night, with the 25 ns setting of <traim_alarm>.  At some point today I'll stop it and look at the data.  I think it might have excluded all satellites throughout the run, but we'll see.

Today I want to Dremel down the fourth SMA connector, mount it on the TIMINGSIG pad, and hook up the boards and look at the output from the output-test stub for the new timing-sync datapath.

Dremeling done; boards are now connected together with one of the 6" SMA cables.

I think we should monitor the received signal because there is a bit of a capacitive voltage divider effect going on between TIMINGSIG and PMT3 since they are both AC-coupled but their back ends are wired together (due to the board design bug).  Also due to the bug, there is an effective 25 ohm termination resistance for AC signals, instead of 50 ohm, since both TIMINGSIG and PMT3 have terminating resistors.  Both of these could cause problems.  One fix would be to remove the terminating resistor or the coupling capacitor on PMT3.  Ray would prefer not to irreversibly change the board though, so instead, I'll look at the signal.

Aha, the DE3 isn't driving CLK_OUT presently (that line was commented out of the top-level Verilog file).  Fixing that.

Still not getting a signal.  Trying to send the clock also out to a GPIO1 header pin, GPIO1_CLKOUTp1.  Still nothing; I think I had problems trying to use the CLKOUT pins before, so let's try a normal pin, GPIO1_D[11] (which is pin #16 on header GPIO 1).  Still nothing.

Tried sending EXT_CLK to GPIO1_D[11] to make sure the pin works.  It does.

Now I'm examining the PULSE control signal.  Upon inspection of the code, it should become 1 after the first PPS edge is received.  It does.  So why no pulses?

It had occurred to me earlier in the day that there might be a timing error (although unlikely with the slow 10 MHz speed of the OCXO clock), but TimeQuest shows a very unconstraining fmax (371 MHz) for EXT_CLK, so it doesn't look like that's the problem.

Getting desperate, trying adding an intermediate wire named "pulse_out_100ns" inside the GPSapp.v Verilog module to see if that helps any.

D'oh, it looks like the trigger point was just off the scope display horizontally!  Boy, do I hate when that happens.  Don't know why I didn't catch that earlier.  Slapping myself.